conversion of Intel instruction into MIPS on FreeBSD

Sunny Goel

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I have a code in which, fetching of CPU vendor information (i.e vendor id , vendor name) is done using Intel x86 based inline asm code. Now I want to port this code into MIPS/FreeBSD. So any body can tell me how I can achieve this in FreeBSD/MIPS..
 
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Sunny Goel

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i know this instruction is only specific to intel architecture , thats why i asked on this forum , how to get the cpu vendor information or vendor id in mips/freebsd .
according to me there must be a way of getting the cpu vendor information or vendor id in freebsd/mips . so if any body know then tell me the way.
 

asteriskRoss

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In FreeBSD I would have looked to the cpuctl(4) device but unfortunately the man page says only i386 and amd64 are supported.
The special device /dev/cpuctl presents interface to the system CPU. It
provides functionality to retrieve CPUID information, read/write machine
specific registers (MSR) and perform CPU firmware updates.

For each CPU present in the system, the special device /dev/cpuctl%d with
the appropriate index will be created. For multicore CPUs such a special
device will be created for each core.

Currently, only i386 and amd64 processors are supported.

Perhaps you could look at the relevant MIPS instruction set reference? Or perhaps take a look to see whether/how another operating system like GNU/Linux has implemented it?
 

usdmatt

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according to me there must be a way

I've just had a quick scan through the MIPS (64bit) instruction set reference and don't see anything at all that looks like it might get CPU information. As a RISC cpu is actually has quite a small instruction set. I'm no kernel hacker so I could of missed something, but assuming it should exist doesn't mean it will.
 

SirDice

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In FreeBSD I would have looked to the cpuctl(4) device but unfortunately the man page says only i386 and amd64 are supported.
That's probably because it uses the x86 CPUID instruction.

I've just had a quick scan through the MIPS (64bit) instruction set reference and don't see anything at all that looks like it might get CPU information. As a RISC cpu is actually has quite a small instruction set.
Yep, already did that too.

As I said, I really don't know of any other architecture that has specific instructions to provide this information.
 

asteriskRoss

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The reason I suggested looking at GNU/Linux is that I ran a quick search and found this source file tantilisingly called cpuid_mips.c from a library project called OpenBLAS. On GNU/Linux it reads /proc/cpuinfo and seems to expect to be able to differentiate between variants of the Loongson 3 MIPS64 processor. So... it might be worth seeing how /proc/cpuinfo has been implemented.
 
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Sunny Goel

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guys i know how to do it with c code , but i am asking that how to do it with inline assembly in freebsd/mips ?
 

asteriskRoss

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i know how to do it with c code
Sunny Goel, Perhaps for the benefit of other people finding this thread you could post your C source code for fetching CPU information on a MIPS processor?

i am asking that how to do it with inline assembly in freebsd/mips
If you have working code in C for fetching CPU information on a MIPS processor, why use inline assembler at all? But assuming you have a valid reason, why not just compile your working code and examine the machine instructions that the compiler generates?
 

SirDice

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I had a look through a bunch of Linux code last night. As far as I can tell the CPU type is pretty much hardcoded at compile time. There are no specific assembler instructions to get this information. I did see some tricks where they read a couple of registers from certain addresses to get a board type variation but this looks to be specific for certain development boards.
 

asteriskRoss

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The WikiChip website looks like it might be helpful:
The Processor ID (PRId) is a read-only, special-purpose register found in the MIPS32 and MIPS64 ISAs that can be queried to identify the MIPS CPU. The Processor ID should be unique for each instruction set or CPU control register change. The PRId is the 15th register in Coprocessor 0.
And also says that the MFC0 instruction can be used to read from registers in coprocessor 0.

The WikiChip page references the /arch/mips/include/asm/cpu.h Linux kernel header file for interpretation of the return values.
 
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