Pi Zero format boards that are supported.

I've dd'ed the image to a new sd card :

Code:
dd if=ZERO-3W_EFI.img of=/dev/sdk

and even in this case I saw a black screen,so I'm sure that the values chosen by you are wrong...
 
in DwHdmi.c at DWHDMI_MPLL_CONFIG mDwHdmiMpllConfig[] = {
add this the second line
{ 46000, 0x00b3, 0x0000, 0x0000 },
between the { 40000... line and the { 65000 ....line
and rebuild
it's pulled from linux source
 
The developer that I have hired suggests to play with the settings here :

https://github.com/jaredmcneill/qua...n/Rockchip/Rk356x/Drivers/DisplayDxe/DwHdmi.h
https://github.com/jaredmcneill/qua...n/Rockchip/Rk356x/Drivers/DisplayDxe/DwHdmi.c

He asks to provide some input from my current know-how and the timing calculator to ChatGPT... and let's see what the bot will make up.
cleardot.gif

I have no idea about what to do.
 
well, i researched a bit more and here is what i found
the pixel clock is set in Vop2.c and the value comes from the monitor timings. For your display should be 44000 Mhz
the clock that has to be set is DCLK_VOP0 (a soc clock). This clocks parent is another clock HPLL. HPLL minimul hardware frequency is 74Mhz (720p).
HPLL can generate a lot of frequencies and DCLK_VOP0 has a divider which is always 1 in current edk2-rockchip code
so if your needed clock is not in
.Rate = 1200000000,
.Rate = 594000000,
.Rate = 297000000,
.Rate = 200000000,
.Rate = 148500000,
.Rate = 74250000,
this list you are screwed.
linux has configured a lot more PLL RATES like
2208000000, 2184000000, 2160000000, 2088000000, 2064000000, 2040000000, 2016000000, 1992000000, 1920000000, 1896000000, 1800000000, 1704000000, 1608000000, 1600000000, 1584000000, 1560000000, 1536000000, 1512000000, 1488000000, 1464000000, 1440000000, 1416000000, 1400000000, 1392000000, 1368000000, 1344000000, 1320000000, 1296000000, 1272000000, 1248000000, 1200000000, 1188000000, 1104000000, 1100000000, 1008000000, 1000000000, 912000000, 816000000, 800000000, 724000000, 700000000, 696000000, 600000000, 594000000, 500000000, 408000000, 312000000, 297000000, 292500000, 241500000, 216000000, 200000000, 148500000, 135000000, 128000000, 126400000, 119000000, 115200000, 108000000, 101000000, 100000000, 96000000, 78750000, 74250000
so what i have to do is program DCLK_VOP0 . find an integer number 1 >= div <= 255 like div * pixelClock = one of the numbers above
then set the pll to that number and DCLK_VOP0 divisor to div

im trying to set my monitor in 720x480 which has a 27Mhz clock
if i succeed probably the code will be good enough for your monitor too
 
I don't want to ask you too much,but can u also try to set your monitor to 960×544 ? I'm planning to buy this display as plan B :


but I need to be sure that it will work out of the box,without the serious chance that we aren't able to fix the code. I can't waste 90 euros.
 
can you post output from this script run as root on the linux rk3456x
Code:
#!/bin/bash
for dir in $(find /sys/kernel/debug/clk/ -type d)
do
if [ -f "$dir/clk_rate" ]
then
name=${dir##*/}
rate=$(cat "$dir/clk_rate")
parent=$(cat "$dir/clk_parent" 2>/dev/null)
ena=$(cat "$dir/clk_enable_count")
echo  -e "$name\t$rate\t$parent\t$ena"
fi
 
in
./edk2-rockchip/Silicon/Rockchip/Rk356x/Library/CruLib/CruLib.c
at STATIC CRU_PLL_RATE CruPllRates[] = {
delete all the array definition and replace it with this
Code:
STATIC CRU_PLL_RATE CruPllRates[] = {
 { .Rate = 2208000000U, .FbDiv = 92, .PostDiv1 = 1, .RefDiv = 1, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 2184000000U, .FbDiv = 91, .PostDiv1 = 1, .RefDiv = 1, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 2160000000U, .FbDiv = 90, .PostDiv1 = 1, .RefDiv = 1, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 2088000000U, .FbDiv = 87, .PostDiv1 = 1, .RefDiv = 1, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 2064000000U, .FbDiv = 86, .PostDiv1 = 1, .RefDiv = 1, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 2040000000U, .FbDiv = 85, .PostDiv1 = 1, .RefDiv = 1, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 2016000000U, .FbDiv = 84, .PostDiv1 = 1, .RefDiv = 1, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 1992000000U, .FbDiv = 83, .PostDiv1 = 1, .RefDiv = 1, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 1920000000U, .FbDiv = 80, .PostDiv1 = 1, .RefDiv = 1, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 1896000000U, .FbDiv = 79, .PostDiv1 = 1, .RefDiv = 1, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 1800000000U, .FbDiv = 75, .PostDiv1 = 1, .RefDiv = 1, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 1704000000U, .FbDiv = 71, .PostDiv1 = 1, .RefDiv = 1, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 1608000000U, .FbDiv = 67, .PostDiv1 = 1, .RefDiv = 1, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 1600000000U, .FbDiv = 200, .PostDiv1 = 1, .RefDiv = 3, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 1584000000U, .FbDiv = 132, .PostDiv1 = 2, .RefDiv = 1, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 1560000000U, .FbDiv = 130, .PostDiv1 = 2, .RefDiv = 1, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 1536000000U, .FbDiv = 128, .PostDiv1 = 2, .RefDiv = 1, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 1512000000U, .FbDiv = 126, .PostDiv1 = 2, .RefDiv = 1, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 1488000000U, .FbDiv = 124, .PostDiv1 = 2, .RefDiv = 1, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 1464000000U, .FbDiv = 122, .PostDiv1 = 2, .RefDiv = 1, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 1440000000U, .FbDiv = 120, .PostDiv1 = 2, .RefDiv = 1, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 1416000000U, .FbDiv = 118, .PostDiv1 = 2, .RefDiv = 1, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 1400000000U, .FbDiv = 350, .PostDiv1 = 2, .RefDiv = 3, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 1392000000U, .FbDiv = 116, .PostDiv1 = 2, .RefDiv = 1, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 1368000000U, .FbDiv = 114, .PostDiv1 = 2, .RefDiv = 1, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 1344000000U, .FbDiv = 112, .PostDiv1 = 2, .RefDiv = 1, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 1320000000U, .FbDiv = 110, .PostDiv1 = 2, .RefDiv = 1, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 1296000000U, .FbDiv = 108, .PostDiv1 = 2, .RefDiv = 1, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 1272000000U, .FbDiv = 106, .PostDiv1 = 2, .RefDiv = 1, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 1248000000U, .FbDiv = 104, .PostDiv1 = 2, .RefDiv = 1, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 1200000000U, .FbDiv = 100, .PostDiv1 = 2, .RefDiv = 1, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 1188000000U, .FbDiv = 99, .PostDiv1 = 2, .RefDiv = 1, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 1104000000U, .FbDiv = 92, .PostDiv1 = 2, .RefDiv = 1, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 1100000000U, .FbDiv = 275, .PostDiv1 = 2, .RefDiv = 3, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 1008000000U, .FbDiv = 84, .PostDiv1 = 2, .RefDiv = 1, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 1000000000U, .FbDiv = 250, .PostDiv1 = 2, .RefDiv = 3, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 912000000U, .FbDiv = 76, .PostDiv1 = 2, .RefDiv = 1, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 816000000U, .FbDiv = 68, .PostDiv1 = 2, .RefDiv = 1, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 800000000U, .FbDiv = 200, .PostDiv1 = 2, .RefDiv = 3, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 724000000U, .FbDiv = 181, .PostDiv1 = 2, .RefDiv = 3, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 700000000U, .FbDiv = 350, .PostDiv1 = 4, .RefDiv = 3, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 696000000U, .FbDiv = 116, .PostDiv1 = 4, .RefDiv = 1, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 600000000U, .FbDiv = 100, .PostDiv1 = 4, .RefDiv = 1, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 594000000U, .FbDiv = 99, .PostDiv1 = 4, .RefDiv = 1, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 500000000U, .FbDiv = 125, .PostDiv1 = 6, .RefDiv = 1, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 408000000U, .FbDiv = 68, .PostDiv1 = 2, .RefDiv = 1, .PostDiv2 = 2, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 312000000U, .FbDiv = 78, .PostDiv1 = 6, .RefDiv = 1, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 297000000U, .FbDiv = 99, .PostDiv1 = 4, .RefDiv = 2, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 292500000U, .FbDiv = 195, .PostDiv1 = 4, .RefDiv = 1, .PostDiv2 = 4, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 241500000U, .FbDiv = 161, .PostDiv1 = 4, .RefDiv = 2, .PostDiv2 = 2, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 216000000U, .FbDiv = 72, .PostDiv1 = 4, .RefDiv = 1, .PostDiv2 = 2, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 200000000U, .FbDiv = 100, .PostDiv1 = 3, .RefDiv = 1, .PostDiv2 = 4, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 148500000U, .FbDiv = 99, .PostDiv1 = 4, .RefDiv = 1, .PostDiv2 = 4, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 135000000U, .FbDiv = 45, .PostDiv1 = 4, .RefDiv = 2, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 128000000U, .FbDiv = 16, .PostDiv1 = 3, .RefDiv = 1, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 126400000U, .FbDiv = 79, .PostDiv1 = 5, .RefDiv = 1, .PostDiv2 = 3, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 119000000U, .FbDiv = 119, .PostDiv1 = 4, .RefDiv = 3, .PostDiv2 = 2, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 115200000U, .FbDiv = 24, .PostDiv1 = 5, .RefDiv = 1, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 108000000U, .FbDiv = 45, .PostDiv1 = 5, .RefDiv = 2, .PostDiv2 = 1, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 101000000U, .FbDiv = 101, .PostDiv1 = 6, .RefDiv = 1, .PostDiv2 = 4, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 100000000U, .FbDiv = 150, .PostDiv1 = 6, .RefDiv = 1, .PostDiv2 = 6, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 96000000U, .FbDiv = 96, .PostDiv1 = 6, .RefDiv = 1, .PostDiv2 = 4, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 78750000U, .FbDiv = 315, .PostDiv1 = 6, .RefDiv = 4, .PostDiv2 = 4, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 74250000U, .FbDiv = 99, .PostDiv1 = 4, .RefDiv = 2, .PostDiv2 = 4, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 44000000U, .FbDiv = 44, .PostDiv1 = 6, .RefDiv = 1, .PostDiv2 = 4, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 27000000U, .FbDiv = 45, .PostDiv1 = 5, .RefDiv = 4, .PostDiv2 = 2, .Dsmpd = 1, .Frac = 0, },
 { .Rate = 0 },
};
then if this works after you rebuild there are some other possible minor fixes;
 
I was wondering if a combined EDK2 build was possible. Zero3E and Zero3W.

I notice the u-boot in ports uses a general Zero3 defconfig.
 
im sure they are the same or very similar and should work cross board. I noticed that on my board (opi 3b) the quartz64 image works better than the opi 3b one which crashes frequently
probably some dram timings are bad for opi 3b or something.
 
Be careful to buy boards with a few amount of memory. You will not find a good browser that will run there. I've bought the radxa 3W with 4 Gb of memory and Firefox crashes. There are some other lighter browsers,but they have limited functionalities. No one of them allows to watch youtube videos. And finally,on arm64 there isn't any chromium package and I'm not able to install it from ports. So. Without a good browser,it does not make sense to continue with my project. Who will be interested to use a phone that has a browser with serious limitations ? I'm scared to be forced to buy the radxa 3w with 8 gb of memory to cut this problem at the root.

Since I want to create a phone,I prefer the radxa 3w that has a slimmer profile than the zero 3E.
 
well i don't try to run desktop apps on them but 4gb should be enough to run a browser. the cubie and the milk-v are not even supported as of now (no soc support in freebsd). for videos you need hw decoding or it will suck anyway. i have a pc with some old amd low power cpu and 4gb ram and can run chromium and youtube videos. performance is not great but passable. so 4gb should do.
Code:
CPU: AMD GX-217GA SOC with Radeon(tm) HD Graphics    (1646.98-MHz K8-class CPU)
real memory  = 4294967296 (4096 MB)
avail memory = 3496329216 (3334 MB)
geekbench performance is about the same as rk3566.
 
well i don't try to run desktop apps on them but 4gb should be enough to run a browser. the cubie and the milk-v are not even supported as of now (no soc support in freebsd). for videos you need hw decoding or it will suck anyway. i have a pc with some old amd low power cpu and 4gb ram and can run chromium and youtube videos. performance is not great but passable. so 4gb should do.
Code:
CPU: AMD GX-217GA SOC with Radeon(tm) HD Graphics    (1646.98-MHz K8-class CPU)
real memory  = 4294967296 (4096 MB)
avail memory = 3496329216 (3334 MB)
geekbench performance is about the same as rk3566.

Thanks. This saves to me some money. Unfortunately it does not solve the real problem. To find a good enough browser that does not crash and that allows to decode videos. How did u install chromium from ports ? I'm not able to do it,I get the error that I have tried to fix time ago but unsuccesfully,here :

 
my box is 13.x and amd64 so i installed a package. also this was some time ago as i use that box mostly headless. i bought it cheap for about 30 euros and i was just curious what a $30 box can do. I still used it headless because it has lots of usb ports and it is also fanless. i have a lot of semi weird hardware :)
 
I am not claiming this browser is better but it is an alternative to Mozilla. See how it runs for you on ARM64..

www/falkon
pkg install falkon-qtonly

I have bought around six Zero3E with 1GB and 2 Zero3E with 2GB. I don't feel I need more memory.
I bought the 2GB to try and run mfs. 1GB leaves too little room.

I am doing gpsd things with mine.
 
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