What is a mailbox in programming terms?

I see the term mailbox pop up all over. Mostly on Arm.

I also saw it on Video Output for an Arm board. Video mailbox I think it was called.

Is it computer slang or defined? I am not talking about e-mail or mail services.

The request is done through the HPS-SDM mailbox.
 
I see the term mailbox pop up all over. Mostly on Arm.
It is a hardware mechanism to allow cores to "talk" to each other. The mailbox analogy is appropriate. The "sending" core puts a "message" into a mailbox. The meaning of that message is defined by mutual agreement of the sender and receiver. The "receiving" core is interrupted to indicate the presence of that message, which it then retrieves and interprets.

Such a mechanism is typically used for TLB shootdowns, cache consistency, etc. -- any time two concurrently executing cores have to agree on the state of the hardware and the processes running in it.
 
a form of inter-process communication
No, interprocessOR communication. It addresses the fact that two or more real processors are concurrently executing so a hardware mechanism to connect them is required.

IPC doesn't require any special hardware, just some set of conventions that THE processor observes to pass information between the processes that it manages.
 
Here in the video context. I thought maybe it was from assembly code.
 
No, interprocessOR communication. It addresses the fact that two or more real processors are concurrently executing so a hardware mechanism to connect them is required.

IPC doesn't require any special hardware, just some set of conventions that THE processor observes to pass information between the processes that it manages.
The term mailbox is also used in inter-process (or multi-threaded or distributed) system design, along with terms such as queue, lock, semaphore.
 
The term mailbox is also used in inter-process (or multi-threaded or distributed) system design, along with terms such as queue, lock, semaphore.
The OP mentioned ARM; there, mailboxes are a distinct hardware mechanism designed for interprocessor communication. In a single processor (core) scenario, THE ONE processor knows when it wants to exchange information between processes so no special hardware is required.
 
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