Hello Guys,
My questions might seem a dumb one. Here it is :
As we know ARM has only two interrupt lines going to arm cpu and to handle interrupts from multiple sources, interrupt controllers sits in between cpu and devices.
I am just curious to know how for such an architecture, ISR is registered with the OS (particularly line on the interrupt controller to IRQ line of ARM core).
I see bus_setup_intr and bus_alloc_res functions but none of the seems to have taking irq line number as input parameter.
Any code pointers would be of great help !
My questions might seem a dumb one. Here it is :
As we know ARM has only two interrupt lines going to arm cpu and to handle interrupts from multiple sources, interrupt controllers sits in between cpu and devices.
I am just curious to know how for such an architecture, ISR is registered with the OS (particularly line on the interrupt controller to IRQ line of ARM core).
I see bus_setup_intr and bus_alloc_res functions but none of the seems to have taking irq line number as input parameter.
Any code pointers would be of great help !