FreeBSD and FPGA

Not sure if this is the correct sub-forum for this question.

I recently built the www.lowrisc.org "untethered" project, which creates a RISCV SoC (both processor and peripherals) on FPGA, and also builds a RISCV Linux image, which runs in the Spike emulator (also supplied in the project) or on FPGA. It seemed to work pretty well, relative to my short time spent playing with it.

Has anyone tried to do this, but run FreeBSD on it? I don't mean running FreeBSD on an FPGA board's companion processor (I see projects in the FreeBSD Wiki for doing that), but instead running it directly on the FPGA SoC. That's what "untethered" does. The original rocket RISCV implementation for FPGA relied on a companion processor (usually ARM A9, etc) - for accessing peripherals and IO. The untethered implementation replaces the companion processor with actual peripheral devices on FPGA, creating an untethered SoC that can boot RISCV Linux.

Anyone know of any work being done on this idea?
 
As long as FreeBSD support for the RISC-V ISA is complete (you know, compiler, code generation and all) you still need drivers for peripherals and IO, whether they are in FPGA or not.
So far, my only experience with running anything on a processor in a FPGA is running Mecrisp-Ice on a Nandland Go board. But that is standalone Forth, so it's not FreeBSD (and perhaps not an operating system).
 
As long as FreeBSD support for the RISC-V ISA is complete (you know, compiler, code generation and all) you still need drivers for peripherals and IO, whether they are in FPGA or not.
So far, my only experience with running anything on a processor in a FPGA is running Mecrisp-Ice on a Nandland Go board. But that is standalone Forth, so it's not FreeBSD (and perhaps not an operating system).

I don't really know if RISC-V is in FreeBSD yet. It seems semi-reasonable that it is, since RISC-V is a Berkeley project. But, then again, so are a lot of other things, and they are not necessarily automatic seguays into FreeBSD. :)

There's a video that works for fast-track enlightenment about the ISA (and attendant architectures):

--https://www.youtube.com/watch?v=Qq1nMNVCRg8

I think the intention (they use the term "modest" to go with that): is to replace the world's ISA(s). The title of this thread is mis-named - the post is really more about a new ISA, rather than just running an implementation of it on FPGA (the latter is necessary without hardware). Some hardware has started to appear, however.
 
Krste Asanovic's RISC-V talk at MeetBSD 2016

A couple of friends and I happened to sit with this gentleman for lunch one day (at MeetBSD), and we were all impressed by the guy's ability (and inclination, aka kindness) to explain RISC-V and the basics of processor design and manufacturing in general to us in layman's terms. 'wish I could remember something to pass along here, but even in layman's terms, most of it was out of my league (so I don't remember much).
 
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