Flushing writes in buffer of Memory Controller to DDR device

[rathaval]

Hello All,

I have a platform that supports DDR4. At some point in my code, I need to push the writes in my code all the way to the DIMM or DDR device. My requirement is to ensure the write reaches the row,bank,bank group,column of the DDR device on the DIMM. I need to read what I've written to the main memory. I do not want caching to get me the value. Instead after writing I want to fetch this value from main memory(DIMM's).

So far I've been using Intel's x86 instruction wbinvd(write back and invalidate cache). However this means the caches and TLB are flushed. Write-back requests go to the main memory.
However, there is a reasonable amount of time this data might reside in the write buffer of the Memory Controller( Intel calls it integrated memory controller or IMC). The Memory Controller
might take some more time depending on the algorithm that runs in the Memory Controller to handle writes.


Is there a way I force all existing or pending writes in the write buffer of the memory controller to the DRAM devices ??
What I am looking for is something more direct and more low-level than wbinvd. If you could point me to right documents or specs that describe this I would be grateful.

Thanks for taking the time to read this,
Rohit

 

[rathaval]

Re: Flushing writes in buffer of Memory Controller to DDR de

Any ideas everyone ?

 

[ralphbsz]

Re: Flushing writes in buffer of Memory Controller to DDR de

I have a platform that supports DDR4. At some point in my code, I need to push the writes in my code all the way to the DIMM or DDR device. My requirement is to ensure the write reaches the row,bank,bank group,column of the DDR device on the DIMM. I need to read what I've written to the main memory. I do not want caching to get me the value. Instead after writing I want to fetch this value from main memory(DIMM's).

Please explain why you care. Why is writing to the actual DIMM a requirement?

You are the user of an operating system. You write programs. These programs read and write from "memory", by loading and storing at memory addresses. In user space, these memory addresses are virtualized. Furthermore, the CPU hardware and its multi-level caches further virtualize these memory addresses into various layers of hardware. Are you finding that something that you have stored was not loaded later? That would be astonishing, but I've seen it happen. Or are you finding that the performance of the memory subsystem is not to your liking?

By the way, these hardware-specific questions tend to be very difficult. Helping you would take me many hours of work, perhaps day. I do this kind of stuff at work occasionally. If you really care, I would suggest that you contact the manufacturer of the CPU (most likely Intel), and discuss your requirement with their apps group.