Hello everyone,
I am wondering if I can use the most significant bit of a pointer as a flag. That means storing a bit of information in the most significant bit, and clear this bit with a mask before using the memory address.
I did not find any official documentation about the layout of the virtual address space of a FreeBSD process, but this document (page 4) says:
I think the high half of the virtual address space is inaccessible to the process (in other words, malloc() can't return an address in that area). Therefore the most significant bit of any memory address accessible to the process should always be clear (equal to zero). I would like to confirm that by finding an official FreeBSD documentation showing the layout of the virtual address space of a process.
The only FreeBSD ports my program has to be compatible with are: powerpc64le, amd64 and aarch64. I understand that for 64-bit ARM and 64-bit x86, the architecture dictates that the high half of the address space is reserved for the kernel, but I did not find such guarantee in the Power ISA 3.0 specification.
Thank you for your help.
I am wondering if I can use the most significant bit of a pointer as a flag. That means storing a bit of information in the most significant bit, and clear this bit with a mask before using the memory address.
I did not find any official documentation about the layout of the virtual address space of a FreeBSD process, but this document (page 4) says:
The kernel’s virtual addresses are permanently mapped into the high part of every process address space.
I think the high half of the virtual address space is inaccessible to the process (in other words, malloc() can't return an address in that area). Therefore the most significant bit of any memory address accessible to the process should always be clear (equal to zero). I would like to confirm that by finding an official FreeBSD documentation showing the layout of the virtual address space of a process.
The only FreeBSD ports my program has to be compatible with are: powerpc64le, amd64 and aarch64. I understand that for 64-bit ARM and 64-bit x86, the architecture dictates that the high half of the address space is reserved for the kernel, but I did not find such guarantee in the Power ISA 3.0 specification.
Thank you for your help.