/bin/sh read words with string.

Hi all,

I want to write a /bin/sh script to compile my c-programs. But I have a problem with /bin/sh:
For example:
Code:
#!/bin/sh

wheremylib='/usr/home/iam/work' # here is my lib.
use="file1.c file2.c file3.c" # files that need to compile too.

# Really I should be use next style:
# cc -o mypo mypo.c /usr/home/iam/work/file1.c /usr/home/iam/work/file2.c 
        /usr/home/iam/work/file3.c -I/usr/home/iam/work/

# *** in here I must write code, to parse $use variable and make it so:
# use == '/usr/home/iam/work/file1.c /usr/home/iam/work/file2.c /usr/home/iam/work/file3.c '
# ***

cc -o mypo mypo.c $use -I$wheremylib

Before I used :
Code:
#!/bin/sh
....
wheremylib='/usr/home/iam/work'
m1='file1.c'
m2='file2.c'
m3='file3.c'

use=''; i=3
while [ $i -ge '0' ]; do
   use="$use $wheremylib/\$m$i"
   i=`expr $i - 1`
done
eval echo $use
...
Result:
/usr/home/iam/work/file1.c /usr/home/iam/work/file2.c /usr/home/iam/work/file3.c

But it's not easy. If I want to remove $m2 variable - I need to rewrite the index in $m3, ... $mN.

Okay, now I have variable: use="name1 name2 name3 ... nameN"..
*For example: use="mstring.c mmath.c mlib.c marr.c"
And variable $wheremylib - has full path name to my lib.
I need to concatenate all elements with variable $use with variable $wheremylib.

This can be done using the SH? Help me, please.
 
Why not use makefile for that ?
Code:
CXX = cc
CXXFLAGS = -Wall -I /usr/home/iam/work
LDFLAGS =

all: mypo
mypo: mypo.c file1.c file2.c file3.c
   $(CXX) $(CXXFLAGS) $(LDFLAGS) $>

.PHONY: clean
clean:
   rm -f mypo *.o
 
I do not know how it is. I have not long been using UNIX (FreeBSD). Thanks, now I read handbook about create Makefile.
 
Simple as that. Trite and simple. Operator "for" in /bin/sh as in python :) .
Code:
#!/bin/sh
wheremylib='/usr/home/iam/work'
include='file1.c file2.c file3.c'

use=''
for i in $include; do
    use="$use $wheremylib/$i"
done

cc -o mypo mypo.c $use -I$wheremylib
 
Oh, that's the second option.
Code:
#!/bin/sh
wheremylib='/usr/home/iam/work'
include='file1.c file2.c file3.c'

set $include

use=''; c=1
eval "len=\${#$c}"
while [ $len -gt '0' ]; do
    eval "name=\$$c"
    use="$use $wheremylib/$name"    
    c=`expr $c + 1`
    eval "len=\${#$c}"
done

cc -o mypo mypo.c $use -I$wheremylib
 
As for as BSD make - BSD make don't understand 4 space (It requires a mark "tab", etc. "\t") in terms:
Code:
mypo: mypo.c file1.c file2.c file3.c
   $(CXX) $(CXXFLAGS) $(LDFLAGS) $>

or
Code:
clean:
   rm -f mypo *.o
In addition to the expression:
mypo: mypo.c file1.c file2.c file3.c
I must write as:
mypo: mypo.c /usr/home/iam/work/file1.c /usr/home/iam/work/file2.c /usr/home/iam/work/file3.c
--it is inconvenient
Maybe I'll use / bin/sh to generate Makefile.
Just my editors/vim or devel/geany editors use 4 space in click Tab button. :)
 
doorways said:
As for as BSD make - BSD make don't understand 4 space (It requires a mark "tab", etc. "\t") in terms:
Correct. The command part of a Make rule must start with a tab character. That's not just BSD Make, it's exactly the same with GNU Make. It's just the way it is. Personally, I loathe tabs. But this is one case where I have no choice.

Fonz

P.S. If you're going to be compiling often, especially for larger projects, I really recommend you familiarise yourself with Make. It will pay off in the long run as it is a whole lot smarter and more flexible than any shell script you can write. BSD make is in the base system, GNU make (which is possibly better known because pretty much all Linux distros use that) is in ports: devel/gmake.
 
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