Accessing GPIO on PC Engines APU.3B4

Sergey.m

New Member


Messages: 2

#1
I'm trying to use GPIO functionality provided by nct5104d chip on the APU board.

I have installed FreeBSD 11 with nctgpio and gpiobus modules loaded. However, when I'm trying to run gpioctl, I'm getting an error message, and no GPIO device exists in /dev:

Code:
root@apu-freebsd:/usr/home/conveyor # kldstat
Id Refs Address            Size     Name
 1    6 0xffffffff80200000 1f67a88  kernel
 2    1 0xffffffff82221000 20f2     nctgpio.ko
 3    1 0xffffffff82224000 3a23     gpiobus.ko
root@apu-freebsd:/usr/home/conveyor # gpioctl -lv
gpio_open: No such file or directory
root@apu-freebsd:/usr/home/conveyor # ls /dev/gp*
ls: No match.
I have BIOS v4.0.11 (20170724) and both UART C and D disabled (though I've tried to toggle them back in forth without any difference).

Did anyone run into a similar problem before?

Thanks!
 

Phishfry

Son of Beastie

Thanks: 874
Messages: 2,769

#2
I have used nctgpio with APU1 and APU2. I will test with APU3 and let you know.

There is an issue where the gpio is slightly different for the APU3. They use a gpio pin for switching SIM sockets electrically.
With the APU3 having 2 SIM sockets. So you can switch cellular networks via gpio.
 

Phishfry

Son of Beastie

Thanks: 874
Messages: 2,769

#4
/usr/src/sys/dev/nctgpio/nctgpio.c

Here is what you need to mod on FreeBSD source- then recompile:
Code:
struct nuvoton_vendor_device_id {
   uint16_t       chip_id;
   const char *       descr;
} nct_devs[] = {
   {
       .chip_id   = 0x1061,
       .descr       = "Nuvoton NCT5104D",
   },
   {
       .chip_id   = 0xc452,
       .descr       = "Nuvoton NCT5104D (PC-Engines APU)",
   },
};
 

Phishfry

Son of Beastie

Thanks: 874
Messages: 2,769

#5
That is strange as my APU3B2 works:

Code:
root@APU3:~ # dmesg | grep 'gpio'
gpio0: <Nuvoton NCT5104D (PC-Engines APU)> at port 0x2e-0x2f on isa0
gpiobus0: <GPIO bus> on gpio0
gpioc0: <GPIO controller> on gpio0
root@APU3:~ # gpioctl -lv
pin 00:   1   GPIO00<IN,OD>, caps:<IN,OUT,OD,PP,II,IO>
pin 01:   1   GPIO01<IN,OD>, caps:<IN,OUT,OD,PP,II,IO>
pin 02:   1   GPIO02<IN,OD>, caps:<IN,OUT,OD,PP,II,IO>
pin 03:   1   GPIO03<IN,OD>, caps:<IN,OUT,OD,PP,II,IO>
pin 04:   1   GPIO04<IN,OD>, caps:<IN,OUT,OD,PP,II,IO>
pin 05:   1   GPIO05<IN,OD>, caps:<IN,OUT,OD,PP,II,IO>
pin 06:   1   GPIO06<IN,OD>, caps:<IN,OUT,OD,PP,II,IO>
pin 07:   1   GPIO07<IN,OD>, caps:<IN,OUT,OD,PP,II,IO>
pin 08:   0   GPIO08<IN,OD>, caps:<IN,OUT,OD,PP,II,IO>
pin 09:   0   GPIO09<IN,OD>, caps:<IN,OUT,OD,PP,II,IO>
pin 10:   0   GPIO10<IN,OD>, caps:<IN,OUT,OD,PP,II,IO>
pin 11:   0   GPIO11<IN,OD>, caps:<IN,OUT,OD,PP,II,IO>
pin 12:   0   GPIO12<IN,OD>, caps:<IN,OUT,OD,PP,II,IO>
pin 13:   0   GPIO13<IN,OD>, caps:<IN,OUT,OD,PP,II,IO>
pin 14:   0   GPIO14<IN,OD>, caps:<IN,OUT,OD,PP,II,IO>
pin 15:   0   GPIO15<IN,OD>, caps:<IN,OUT,OD,PP,II,IO>
 

Phishfry

Son of Beastie

Thanks: 874
Messages: 2,769

#6
Just a follow-up. My newest APU3 with 4G RAM fails the same with GPIO a different chip id.
My APU3 with 2G works with the old chip id. Maybe an older revision of the board. I got it 4 months ago.
 

Phishfry

Son of Beastie

Thanks: 874
Messages: 2,769

#8
I will check it out and leave feedback on the PR. Have you bumped anybody yet? I can ask Gonzo to commit it.
He is pretty active in the embedded world.
 
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